| Process | IBM 45nm SOI |
|---|---|
| Dimension | 11 X 13 mm2 |
| Transistor Count | 600 Million |
| Frequency | 833 MHz |
| Power | 28.8 W |
| Core | Dual-issue, in-order, 10-stage pipeline |
|---|---|
| ISA | 32-bit Power Architecture |
| L1 Cache | Private split 4-way set associative write-through 16 KB I/D |
| L2 Cache | Private inclusive 4-way set associative 128 KB |
| Line Size | 32 B |
| Coherence Protocol | MOSI (O: forward state) |
| Directory Cache | 128 KB (1 owner bit, 1 dirty bit) |
| Snoop Filter | Region tracker (4KB regions, 128 entries) |
| NOC Topology | 6 X 6 Mesh |
|---|---|
| Channel Width | 137 bits (Ctrl packets - 1 flit, data packets - 3 flits) |
| Virtual Networks |
1. Globally ordered - 4 VCs, 1 buffers each
2. Unordered - 2 VCs, 3 buffers each
|
| Router | XY routing, cut-through, multicast, lookahead bypassing |
| Pipeline | 3-stage router (1- stage with bypassing), 1- stage link |
| Notification Network | 36-bits wide, bufferless, 13 cycle time window, max 4 pending messages |
| Memory Controller | 2 X Dual Port Cadence DDR2 Memory Controller + PHY |
|---|---|
| FPGA Controller | 1 X Packet-switched flexible data-rate controller |